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Informace o produktu
Přehled produktu
The NB6N14SMNG is a 3.3V 1:4 AnyLevel differential input to LVDS fan-out buffer/translator in 16 pin QFN package. This differential 1:4 clock or data receiver and will accept AnyLevel differential input signals, LVPECL, CML or LVDS. These signals will be translated to LVDS and four identical copies of clock or data will be distributed, operating up to 2GHz or 2.5Gb/s, respectively. As such, the NB6N14S is ideal for SONET, GigE, fibre channel, backplane and other clock or data distribution applications. It has a wide input common mode range from GND + 50mV to VCC - 50mV. Combined with the 50 ohm internal termination resistors at the inputs, the NB6N14S is ideal for translating a variety of differential or single ended clock or data signals to 350mV typical LVDS output levels.
- Maximum input clock frequency <gt/> 2GHz
- Maximum input data rate <gt/> 2.5Gb/s
- 1ps maximum RMS clock jitter
- Typically 10ps data dependent jitter
- 380ps typical propagation delay
- 120ps typical rise and fall times
- Vref_ac reference output
- TIA/EIA - 644 compliant
- Functionally compatible with existing 3.3V LVEL, LVEP, EP and SG devices
Technické specifikace
Buffer Rozvětvení, Překladač
4Výstupů
3.6V
16Pinů
CML, LVDS, LVPECL
85°C
MSL 1 - Neomezené
2GHz
3V
QFN
LVDS
-40°C
-
No SVHC (27-Jun-2024)
Technické dokumenty (2)
Alternativy pro NB6N14SMNG
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Související produkty
Nalezené produkty: 2
Legislativa a životní prostředí
Country in which last significant manufacturing process was carried outZemě původu:Thailand
Country in which last significant manufacturing process was carried out
RoHS
RoHS
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